Literature: Nios II Processor

This page lists the Nios II literature available at the time of release of the Nios II Embedded Design Suite (EDS) v13.1. For the latest and most up-to-date documentation, visit Altera's on-line literature page.

• The Nios II Processor Reference Handbook answers the question “What is the Nios II processor?” and is the primary reference for the Nios II processor architecture.
  
• The Nios II Software Developer’s Handbook answers the question “How do I write programs for the Nios II processor?” and is the primary reference for programming the Nios II processor.
  
• The Embedded Peripherals IP User Guide describes peripherals provided by Altera that work seamlessly with the Nios II processor and are included with Quartus II software.

Other related documents, such as tutorials and user guides, cover specific topics that are not included in the handbooks.

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Nios II Processor Reference Handbook

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Section I. Nios II Processor Design
• Chapter 1. Introduction
• Chapter 2. Processor Architecture
• Chapter 3. Programming Model
• Chapter 4. Instantiating the Nios II Processor in SOPC Builder
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Section II. Nios II Processor Implementation and Reference
• Chapter 5. Nios II Core Implementation Details
• Chapter 6. Nios II Processor Revision History
• Chapter 7. Application Binary Interface
• Chapter 8. Instruction Set Reference

[–]

Nios II Software Developer's Handbook

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Section I. Nios II Software Development
• Chapter 1. Overview
• Chapter 2. Getting Started with the Graphical User Interface
• Chapter 3. Getting Started from the Command Line
• Chapter 4. Nios II Software Build Tools
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Section II. Hardware Abstraction Layer
• Chapter 5. Overview of the Hardware Abstraction Layer
• Chapter 6. Developing Programs Using the Hardware Abstraction Layer
• Chapter 7. Developing Device Drivers for the Hardware Abstraction Layer
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Section III. Advanced Programming Topics
• Chapter 8. Exception Handling
• Chapter 9. Cache and Tightly-Coupled Memory
• Chapter 10. MicroC/OS-II Real Time Operating System
• Chapter 11. Ethernet and the NicheStack TCP/IP Stack - Nios II Edition
• Chapter 12. Read-Only Zip File System
• Chapter 13. Publishing Component Information to Embedded Software
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Section IV. Reference Material
• Chapter 14. HAL API Reference
• Chapter 15. Nios II Software Build Tools Reference

Appendix A. Using the Nios II Integrated Development Environment

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SOPC Builder User Guide

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Section I. User Guide

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Section II. SOPC Builder Walkthroughs

[–]

Embedded Design Handbook

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Section I. Introduction
• Chapter 1. First-Time Designer's Guide
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Section II. Nios II Software Development
• Chapter 2. Developing Nios II Software
• Chapter 3. Debugging Nios II Designs
• Chapter 4. Nios II Command-Line Tools
• Chapter 5. Optimizing Nios II C2H Compiler Results
  • edh_c2h_optimization_design_files.zip
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Section III. System Level Design
• Chapter 6. Avalon Memory-Mapped Design Optimizations
• Chapter 7. Memory System Design
• Chapter 8. Hardware Acceleration and Coprocessing
• Chapter 9. Verification and Board Bring-Up
• Chapter 10. Interfacing an External Processor to an Altera
• Chapter 11. Avalon-MM Byte Ordering Considerations FPGA

Related Documentation

 

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Release Notes

• MegaCore IP Library Release Notes and Errata
  (All IP and Nios II errata and release notes are combined into one document beginning with version 7.2)
  
• Nios II Embedded Design Suite Release Notes (ver 13.1, Nov 2013, 243 KB)
  

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Nios II Hardware Development

• AN 548: Nios II Compact Configuration System for Cyclone III (ver 1.0, Nov 2008, 320 KB)
       Design Files for AN 548 (597 KB)
  
• AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
       Design Files for AN 531 (1 MB)
  
• AN 391: Profiling Nios II Systems (ver 3.0, Jul 2011, 325 KB)
• Creating Multiprocessor Nios II Systems Tutorial (ver 2.0, Jun 2011, 1 MB)
• Using Nios II Floating-Point Custom Instructions Tutorial (ver 2.0, Feb 2010, 235 KB)
       Tutorial design files (4 KB)
  
• Nios II Flash Programmer User Guide (ver 2.2, Mar 2014, 677 KB)
  
• Nios II Hardware Development Tutorial (ver 4.0, May 2011, 1 MB)
       Design Files for Nios II Hardware Development Tutorial (14 KB)
  
• AN 595: Vectored Interrupt Controller Usage and Applications (ver 1.0, Nov 2009, 246 KB)
       Example Designs for AN595 (503 KB)
  
• Nios II 3C25 Microprocessor with LCD Controller Data Sheet (ver 1.1, Mar 2009, 580 KB)
  
• Nios II 3C120 Microprocessor with LCD Controller Data Sheet (ver 1.1, Mar 2009, 634 KB)
  
• AN 351: Simulating Nios II Embedded Processor Designs (ver 1.4, Nov 2013, 375 KB)
       AN 351 Software Files (6 KB)
  
• Using Tightly Coupled Memory with the Nios II Processor Tutorial (ver 2.0, Jul 2011, 1 MB)
       Design Files for Tightly Coupled Memory Tutorial (15 KB)
  
• Nios II Custom Instruction User Guide (ver 2.0, Feb 2011, 1 MB)
• AN527: Implementing an LCD Controller (ver 1.0, May 2008, 344 KB)
  
• AN 350: Upgrading Nios Processor Systems to the Nios II Processor (ver 1.1, Jul 2006, 617 KB)
  

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Software Development

• AN 440: Accelerating Nios II Networking Applications (ver 2.1, Jan 2013, 265 KB)
• Using MicroC/OS-II RTOS with the Nios II Processor Tutorial (ver 3.0, May 2011, 695 KB)
       MicroC/OS-II tutorial software files (7 KB)
  
• Using the NicheStack TCP/IP Stack - Nios II Edition Tutorial (ver 3.0, Jun 2011, 1 MB)
       NicheStack tutorial software files (29 KB)
  
• AN 429: Remote Configuration Over Ethernet with the Nios II Processor (ver 3.0, Apr 2010, 172 KB)
       Application Note 429 Design Files (3 MB)
  
• AN 540: Nios II MPU Usage (ver 1.0, Mar 2010, 385 KB)
       Design Files for AN 540 (221 KB)
  
• My First Nios II Software Tutorial (ver 2.1, Dec 2012, 986 KB)
  
• AN 459: Guidelines for Developing a Nios II HAL Device Driver (ver 4.0, Jul 2011, 2 MB)
• Using Tightly Coupled Memory with the Nios II Processor Tutorial (ver 2.0, Jul 2011, 1 MB)
       Design Files for Tightly Coupled Memory Tutorial (15 KB)
  
• AN543: Debugging Nios II Software Using the Lauterbach Debugger (ver 1.0, Apr 2009, 278 KB)
       Example Design for AN543 (6 MB)
  
• Nios II IDE Help System (ver 1.7, Mar 2009, 1 MB)
  
• NicheStack Technical Manuals (PDFs) (ver , Apr 2007, 1 MB)
  
• NicheStack Technical Reference Manual (HTML) (ver , Apr 2007, 193 KB)
  

[+]

C-to-Hardware Acceleration

• Nios II C2H Compiler User Guide (ver 1.6, Dec 2009, 911 KB)
       dma_c2h_tutorial.c Tutorial design file for Nios II C2H Compiler User Guide (2 KB)
  
• AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
       Design Files for AN 531 (1 MB)
  
• Adding Hardware Accelerators to Reduce Power in Embedded Systems (ver 1.0, Sep 2009, 722 KB)
  
• Accelerating Nios II Systems with the C2H Compiler Tutorial (ver 1.3, Aug 2008, 803 KB)
       Design files for Stratix II and Cyclone II boards (387 KB)
  
• AN 417: Accelerating Functions with the C2H Compiler: Scatter-Gather DMA with Checksum (ver 1.1, Jul 2006, 424 KB)
       Scatter-Gather DMA Design Files (6 KB)
  
• Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions (ver 1.0, May 2006, 296 KB)
  

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Design Guidelines and Applications

• Optimize Motor Control Designs with an Integrated FPGA Design Flow (ver 1.2, May 2012, 811 KB)
  

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SOPC Builder System Development

• Embedded Peripherals IP User Guide (ver 11.0, Jun 2011, 6 MB)
  
• Avalon Verification IP Suite User Guide (ver 3.2, May 2013, 5 MB)
  (Includes SOPC Buider and Qsys tutorials)
       Avalon Verification IP Suite Design Files (23 KB)
  
• Qsys System Design Tutorial (ver 2.0, May 2011, 1 MB)
  
• AN458: Alternative Nios II Boot Methods (ver 2.1, May 2011, 514 KB)
       AN458 design example files (36 KB)
  
• AN624: Debugging with System Console Over TCP/IP (ver 1.0, Aug 2010, 423 KB)
  
• Nios II System Architect Design Tutorial (ver 2.0, Jun 2011, 2 MB)
       Nios II Architect Design Tutorial Design Files (5 MB)
  
• AN 346: Using the Nios II Configuration Controller Reference Designs (ver 1.2, Mar 2009, 793 KB)
  
• AN 446: Debugging Nios II Systems with the SignalTap II Embedded Logic Analyzer (ver 2.0, Jun 2011, 397 KB)
       signal_tap_test software file (9 KB)
  
• AN 323: Using SignalTap II Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB)
  

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Other Related Documentation

• Nios II Performance Benchmarks (ver 8.0, Dec 2012, 234 KB)
  
  

 

GCC Related Documentation

• A list of GCC related documents can be found in the 'Nios II Documentation' located in the Windows start menu. Click on 'Start -> All Programs -> Altera -> Nios II EDS (Altera version) -> Nios II (Altera version) Documentation'.

• To view the complete reference for the Nios II compiler tool-chain, in the left navigational panel of the Nios II (Altera version) Documentation, click on 'Literature -> Using the GNU Compiler Collection (GCC)'. Refer to the Table of Contents for links to Nios II processor-specific content and constraints for ASM operands.

Related Links (the links below will lead you to Altera.com)

• Download the latest version of the Nios II Embedded Design Suite
• Nios II Processor
• SOPC Builder Literature
• Nios II Processor Online Demonstrations
• SOPC Builder Online Demonstrations
• Avalon Interface Specifications
• All Development Kits, Daughter Cards & Programming Hardware
• Altera Development Kits Archive
• Altera Embedded Systems Development Kit, Cyclone III Edition
• Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition
• Arria II GX FPGA Development Kit
• Stratix IV GX FPGA Development Kit
• Nios II Ethernet Standard Design Example
  
• Micrium uC/OS-II Homepage