Generation Report - SDI MegaCore Function v8.1

Entity Name	sdi_megacore_top
Variation Name	hd_3g_duplex
Variation HDL	Verilog HDL
Output Directory	/data/bhoh/tmp/sdi_simulation/modelsim/hdsdi/quartus

File Summary

The MegaWizard interface is creating the following files in the output directory:

File	Description
hd_3g_duplex.v	A MegaCore^® function variation file, which defines a Verilog HDL top-level description of the custom MegaCore function. Instantiate the entity defined by this file inside of your design. Include this file when compiling your design in the Quartus II software.
hd_3g_duplex_bb.v	Verilog HDL black-box file for the MegaCore function variation. Use this file when using a third-party EDA tool to synthesize your design.
hd_3g_duplex.bsf	Quartus^® II symbol file for the MegaCore function variation. You can use this file in the Quartus II block diagram editor.
hd_3g_duplex.vo	Verilog HDL IP functional simulation model
hd_3g_duplex.ppf	This XML file describes the MegaCore pin attributes to the Quartus II Pin Planner.
hd_3g_duplex.qip	Contains Quartus II project information for your MegaCore function variation.
hd_3g_duplex.html	The MegaCore function report file.