ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH WILL BE UNINTERRUPTED OR ERROR-FREE. //**************************************************************** soc-16.0-0.02soc-readme.txt Readme file for SoC Embedded Design Suite (EDS) 16.0 Patch 0.02soc Copyright (C) Altera Corporation 2016 All right reserved. Patch created on June 03 2016 Patch Case#: 379361 //**************************************************************** Description Early IO release is a feature where we can enable DDR functioning prior programming the core RBF (for speeding up the boot time). In this flow, the shared I/O and hard memory controller I/O are configured and released allowing HPS immediate access to them. This also enables availability of shared IO where core RBF can be obtained from TFTP server instead of flash. Early IO release also plays a critical role on providing early response on time critical system. Enhanced the clock configuration code to avoid potential PLL over current scenario at low temperature by having PLL ramp. This is applicable when the final intended MPU clock and NOC clock (based on DTS hand off) is over the safe threshold value. Errata Below are the constrains for this patch 1. Program of encrypted core RBF will fail if secure boot is enabled with authentication key at FPGA (case:368940) Solution: Customer is advised to use secure boot with secure fuse which deemed to be more secure. 2. When early IO release is enabled, reprogramming of peripheral RBF and combined RBF will fail at U-Boot console. Solution: Customer is advised to use standard early IO release flow. Guide Note that the patch will patch U-Boot source only but not tools. Hence customer would need follow the steps as below. 1. Run 'soceds-16.0-0.02soc-linux.run' and select ~/altera/16.0/ as install directory 2. Go to ~/altera/16.0/embedded/examples/hardware/a10_soc_devkit_ghrd/ and rebuild the GHRD 3. Run bsp-editor and create new .../software/uboot_bsp/ project 4. Edit .../software/uboot_bsp/devicetree.dts with chosen { cff-file = "ghrd_10as066n2.periph.rbf"; /* only for SD boot */ early-release-fpga-config; } 5. Run 'make' in .../software/uboot_bsp/ and dd uboot_w_dtb-mkpimage.bin to A2 partition of the sd card 6. Go to .../output_files/ directory and run this command $ quartus_cpf -c --hps -o bitstream_compression=on ghrd_10as066n2.sof ghrd_10as066n2.rbf 7. Update the RBF binary on the target 8. Boot devkit and see successful early I/O release message in uboot output. See core RBF loaded during uboot 'autoboot' before Linux is loaded. If you are using QSPI and NAND boot, you need to use quartus_hps to update the QSPI content. For QSPI and NAND flash, periph.rbf is located at flash offset 0x72_0000 while core.rbf at 0x82_0000 Please refer SOCEDS user guide chapter 9 to learn more about quartus_hps Caution - You must either have previously installed the SoC Embedded Design Suite (EDS) 16.0 software or must install the SoC Embedded Design Suite (EDS) 16.0 software before installing this patch. Otherwise, the patch will not be installed correctly and the SoC Embedded Design Suite (EDS) software will not run properly.