Cyclone® manual Volume 1, Capítulo 2. Arquitetura Cyclone
655187
2008-05-02
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Este capítulo discute a arquitetura Cyclone®, incluindo LABs, IOEs e memória.
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This document lists the Cyclone® FPGA features.
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This document describes how to use Cyclone I/O pins for LVDS and RSDS signaling.
Cyclone® Handbook Volume 1, Chapter 10, Implementing Double Data Rate I/O Signaling in Cyclone Devices
This document note shows implementations of a double data rate I/O interfac using Cyclone® devices.
Cyclone® Handbook, Volume 1, Chapter 11. Using Cyclone Devices in Multiple-Voltage Systems
This chapter discusses MultiVolt I/O operation and using Cyclone® devices in multiple voltage systems.
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This document describes the modes and characteristics of the M4K memory blocks.
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This document gives information on configuration and testing of Cyclone® devices.
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This section provides information on Cyclone® PLLs.