TheChipScalePackage(CSP)

TheChipScalePackage(CSP)

TheChipScalePackage(CSP)

15 15.1 Introduction Since the introduction of Chip Scale Packages (CSP’s) only a few short years ago, they have become one of the biggest packaging trends in recent history. There are currently over 50 different types of CSP’s available throughout the industry and the numbers are increasing almost daily. Intel Flash memory products began using CSP's in the µBGA* ...package a few years ago and have expanded into multiple types of CSP's in order to meet the needs of new product functionality and applications. Currently, the majority of Intel's CSP's are used for flash memory products. However, other types of Intel products are beginning to take advantage of the benefits of CSP's as well. CSP's are evolving so rapidly, that by the time you read this chapter, there will probably be new package information and design considerations to take into account. Intel has attempted to include as much as possible in this chapter, reviewing many different areas such as package information, application considerations, printed circuit board (PCB) design and manufacturing tips and tools. However, since CSP's are continually evolving, the contents of this chapter will continue to evolve. Therefore, until new versions of this package guide are printed, new CSP information and manufacturing considerations for Intel Flash Memory products will continue to be updated in the Flash Memory CSP User's Guide on theWWW at: http://developer.intel.com/design/flash/packtech/index.htm. There are many reasons why CSPs have been so well accepted within the industry. One of the biggest advantages of CSPs is the size reduction of the package (see figure 15.1) vs. more traditional peripherally leaded packages. This is mainly due to the Ball Grid Array (BGA) design of the package. By designing all interconnects under the package in the BGA style, you can increase the number of interconnects while saving PCB routing space. Other manufacturing advantages of CSPs include the self alignment characteristics during PCB assembly reflow and lack of bent leads which cause coplainarity issues. Both of these CSP features increase PCB assembly yields and lower manufacturing costs. One of the barriers for new packages to be accepted in the industry is the lack of existing Surface Mount Technology (SMT) infrastructure such as assembly and manufacturing processes and equipment. This is not the case for CSPs which take advantage of existing infrastructure and in most cases require no capital equipment investment to implement CSPs . In the past, CSP's have been defined as a package that is 1.2X the size of the die. However, some types of CSPs maintain their package size as the internal silicon die reduces in size as a result of the fabrication lithography process gets smaller (die shrink). This effect changes the package to die size ratio. As CSP's have evolved, the definition has changed to "near die size packages with a ball pitch of 1mm or less". As mentioned earlier, Intel has introduced several different types of CSP packages. This is because each application has different requirements. Since almost every application varies, there are many considerations to Read the full TheChipScalePackage(CSP).

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