I/O Altera^® IP

I/O components include clock data recovery (CDR), Phase-Locked Loop (PLL) Definition, double data rate (DDR) Definition, gigabit transceiver block (GXB) Definition, LVDS receiver, LVDS transmitter, PLL reconfiguration, and remote update Altera^® IP.

IP Catalog	Altera^® IP(s)	Comments
ALTASMI_PARALLEL	`altasmi_parallel`	Active serial memory interface parallel Altera^® IP.
ALTCLKCTRL	`altclkctrl`	Clock control block Altera^® IP.
ALTCLKLOCK	`altclklock`	Parameterized PLL Altera^® IP.
ALTDDIO_BIDIR	`altddio_bidir`	DDR bidirectional Altera^® IP.
ALTDDIO_IN	`altddio_in`	DDR input Altera^® IP.
ALTDDIO_OUT	`altddio_out`	DDR output Altera^® IP.
ALTDLL	altdll	delay-locked loop (DLL) Definition Altera^® IP.
ALTDQ	`altdq`	Data strobe Altera^® IP.
ATLDQS	`altdqs`	Parameterized bidirectional data strobe Altera^® IP.
ALTDQ_DQS	atldq_dqs	Parameterized data strobe Altera^® IP.
ALTGX	altgx	High-speed serial interface (HSSI) GXB Altera^® IP.
ALTIOBUF	altiobuf_bidir	Bidirectional I/O buffer Altera^® IP.
	altiobuf_in	Input I/O buffer Altera^® IP.
	altiobuf_out	Output I/O buffer Altera^® IP.
ALTLVDS_RX	`altlvds_rx`	LVDS receiver Altera^® IP.
ALTLVDS_TX	`altlvds_tx`	LVDS transmitter Altera^® IP.
ALTMEMPHY	ALTMEMPHY	External DDR Memory PHY interface Altera^® IP.
ALTOCT	alt_oct	on-chip termination (OCT) Definition Altera^® IP.
ALTPLL	`altpll`	Parameterized PLL Altera^® IP.
ALTPLL_RECONFIG	`altpll_reconfig`	Parameterized PLL reconfiguration Altera^® IP.
ALTREMOTE_UPDATE	`altremote_update`	Parameterized remote update Altera^® IP.
	`altstratixii_oct`	Parameterized OCT Altera^® IP.
ALTTEMP_SENSE	alttemp_sense	Temperature sensing diode (TSD) block Altera^® IP.
MAX^® II oscillator	`altufm_osc`	Oscillator Altera^® IP.